Protel99..
Hardware-layout 2009-11-13 15:23 Read 350 reviews 1. .
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1. . Schematics common errors:. .
(1) report on the ERC PIN does not have access to the signal.
a. . Create a package to the pin when the definition of the I / O attribute;. .
B.. create a symbol or placing components when modifying the properties of the grid is not consistent, PIN and the cable is connected to;.
c. . To create components reverse direction when the pin, pin name must be non-client connections. .
(2) component to drawing bounds: no paper in the component Gallery centers create component diagrams.
(3) to create the project file only partially transferred to the network table pcb: netlist generated when there is no choice for the global. .
(4) when using multipart element, don't use the annotate.
2. . PCB common error: protel technology Daquan. .
(1) the network load when the NODE was not found: the report.
a. . Schematic diagram of the components used in the package not pcb library;. .
b。. Schematic diagram of the components used in pcb library name is not a consistent package;.
c. . Schematic diagram of the components used pcb library pin number inconsistent package. Such as the transistor: sch in pin nu. .
Mber of e, b, c, and pcb for 1, 2, 3.
(2) always can not print to print a paper:. .
a。. When creating the pcb library; in origin.
b. . Repeatedly move and rotate the components, pcb board lay hidden characters. Choose to show all hidden characters, shrink. .
Small pcb, and then move the character to the borders.
(3) DRC reporting network is divided into several sections:. .
Indicates that the network is not connected, see report files, use the select CONNECTED COPPER look.
Another friend reminded to make use WIN2000, reducing opportunities for blue screen; many times the export file, made a new DDB file. .
To reduce the file size and the chance of PROTEL zombie. If you have made a more complex design, try not to use the automatic routing.
In PCB design, layout is an important step in the completion of product design can be said that the preparations are in front of it and do. .
Throughout the PCB to wiring design process to qualify for the highest skill of the finest, the maximum workload. There are single-sided cabling PCB wiring.
, Double-sided and multilayer wiring. Wiring, there are two ways: automatic routing and interactive routing, automatic routing before. .
You can use an interactive comparison of the requirements in advance of the strict line wiring, input and output side should avoid adjacent flat.
OK, so as to avoid reflection interference. Necessary, add ground isolation between two adjacent layers of wiring to be perpendicular to each other, parallel to the easy production. .
Hygiene coupled parasitic.
Automatic routing of cloth through rate, depends on a good placement, routing rules can be pre-set, including alignment of the bending frequency. .
Via the number, the number of the step. Generally be inquisitive, warp, the short-term connectivity, and then proceed.
Maze routing, first to the overall fabric of the connection for optimal routing path, it has been announced according to need to disconnect the line. .
And try again to improve the overall effect.
The current design of high-density PCB through hole has been felt not to adapt, and it wasted a lot of valuable routing channel for. .
To solve this dilemma, a blind and buried hole technology that not only fulfilled via, but also a lot of wiring in..
Road to complete the wiring process was more convenient, more smooth, more perfect, PCB board design process is a complex and. .
Simple process, to very good knowledge of it, the majority of electronic engineering design to your own experiences, in order to get one.
The essence. .
1 power supply, ground handling.
Even in the PCB board layout completed in just fine, but the power, ground and thoughtful consideration of not causing interference. .
Will make product performance, sometimes even affect the product's success. So on electron, ground wiring to seriously on.
Be, the power, the noise generated by ground down to a minimum, to ensure product quality. .
On each engaged in electronic product design engineers who understand ground and power line noise generated by the reason that they are.
Only reduce the noise as to inhibit the expression type:. .
Well known in the power supply, ground decoupling capacitor between added.
Widened as much as possible the power, ground width, it is better than the power supply ground line width, their relationship is: ground> Power Line> signal. .
Line, usually signal line width: 0.2 ~ 0. .3mm, most fine width up to 0. .05 ~ 0. .07mm, the power cord is 1.6 ~ 2.5 mm.
PCB can be used for digital circuits to wire up a wide circuit, shall constitute a ground network to use (analog circuit ground is not..
Can this type of use).
Copper layer with a large area for ground use, the PCB not to be spend on the areas connected with the land use as a ground. Or made. .
Multi-layer boards, power supply, ground floor of the occupation.
2, digital and analog circuit techniques were handled protel Daquan. .
Now there's a lot of PCB is no longer a single function circuits (digital or analog circuits), digital and mixed analog circuits.
Composition. Therefore need to consider when wiring interference between them, in particular to line noise. .
High frequency digital circuit, analog circuit sensitivity to the signal line, the high-frequency signal lines as far as possible away from sensitive.
Analog circuit devices, on earth, the entire PCB to the outside world were only one node, it must be within the PCB office. .
Wylie, die altogether, while in the Board's internal digital and analog is actually separate from among them, only.
Is connected with the outside world in the PCB interfaces (such as plugs, etc.). Analog to digital with a little short then, please note that only one. .
A connection point. Also on the PCB: no, from system design to decide.
3, signal distribution in the power (ground) layer. .
In multilayer printed wiring board, due to the signal cable layer no cloth to finish the rest of the line is not much more layers will cause.
Waste production will increase to a certain degree of effort, cost also increased, and to resolve this conflict, consider the power. .
() On the layer. First of all, you should consider using the power of the second ground. Because the best is to preserve the integrity of the strata.
Sex. .
4, large conductor connection legs.
In the large area of ground (electricity), the common components of legs connected on the connecting leg of the deal requires a comprehensive exam. .
Taking into account that the electrical performance, component leg pads and then covered with copper surface, but on the components of the welding Assembly there is some not.
Home patients, such as: pension with a heater to power. ② easy to create? Weld point. So part? Electrical performance and process requirements. .
Made below.This pads, called thermal isolation (heat shield), commonly known as thermal pads (Thermal), so that you can make.
In the welding section due to excessive heat caused by the possibility of significantly reduced Weld point. Multilayer electrical connection (ground) floor leg Department. .
The same reason.
5 cabling in the network effect. .
In many CAD systems, wiring system is based on the network. Grid, pathway increase stepping too.
Small map field data overload, it is bound to have higher equipment storage space requirements, but also the object computer class power. .
Child products operation speed is greatly affected. While some path is invalid, if the symbol leg pads occupied or to be on.
Loaded hole, will be occupied by holes, etc. are. Grid depopulation, too little access pass rate on the fabric great. So have a density. .
Reasonable grid system to support the conduct of the wiring.
The distance between the legs of the standard components of 0. .1 Inch (2. .54 Mm), so the grid system on the basis of generally set to 0. .1 Inches (..
2. .54 mm) or less than 0. .1 inch whole multiples such as .05 inches, 0.0.0. .025 inches, .02 inches, etc..
6, design rule checking (DRC) protel technology Daquan. .
Wiring design is completed, you will need to carefully check the wiring design conforms to the rules set by the designers also need to verify that the system.
The rules are consistent with the demand for PCB production process in general check the following aspects:. .
Wire and cable, the cable and component pads, line and through-hole components through-hole pads and, through holes and through-hole distance is.
No reasonable and meets the requirements of production. .
The power and ground wire width is appropriate, power supply and ground between tightly coupled (low impedance) whether and in what PCB.
Also allows widening of the local ground. .
For critical signal line whether or not to adopt the best practices, such as the length of the shortest, unprotected line, line-in and line-out was obvious.
To separate. .
Analog and digital circuitry, whether there is a separate ground.
Added in the PCB of the graphics (such as icons, injection standard) will result in the signal circuit. .
On some poor alignment.
Whether the increase in the PCB on the processing line there? Solder meets the requirements of the production process, solder mask size is appropriate, the character symbol is. .
No pressure on the pads in the device, so as not to affect the quality of Denso.
Multilayer formation in the frame edge of the power is reduced, such as the formation of the copper foil power easily lead to short-circuit-board exposed. Almost. .
Mentioned.
The purpose of this document is to describe the use of PowerPCB PADS PCB design software PCB design process and carried out a number. .
Considerations for a working group of designers, design specifications, to facilitate the exchange between designers and cross checked.
Investigation. .
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2, the design process. .
PCB design process is divided into the netlist input, rule sets, components layout, wiring, inspection, review, and output of six steps.
2. .1 Netlist input. .
Netlist input come in two ways, one is the use of the OLE PowerPCB PowerLogic features, select the Connection.
Send Netlist, application of OLE function, you can always maintain the schematic and PCB line graph to minimize the possibility of error. .
Another method is to load directly into the net PowerPCB table, select File > Import,-schematic netlist exports generated.
Entered into. .
2. set the rules. .2
If the schematic design phase in the PCB design rules have been set up is good, will not need to be set. .
These rules, because the input table, design rules as netlist input into PowerPCB. If you modify the design of the regulation.
Then, must be synchronized diagram, schematic and PCB to ensure consistency. In addition to design rules and layer definitions, there are some rules. .
You need to set up, such as Pad Stacks, you need to modify the standard through-hole size. If the designers of the new pad or too.
Hole must be coupled with Layer 25. protel technology Daquan. .
Note:.
PCB design rules, layer definitions, cross hole set, CAM has already shipped out to set the default startup file, named Default. .
Stp, netlist input come in, in accordance with the design of the actual situation, the power network and the distribution of power and ground and. ..
Set other advanced rules. In all of the rules set up after the PowerLogic, use the OLE PowerPCB C. .
Onnection of Rules From PCB features, update the schematic diagram of the rule settings, ensure the schematics and PCB diagram rules.
Unanimously. .
2. .3 components layout.
Netlist entered, all components are zero on the work area, overlapping with, the next step is to. .
These components separately, according to some rules placed neatly, i.e. components layout. PowerPCB provides two ways to hand.
Work layout and automatic layout. 2. .3. .1 Manual layout. .
1. Tools for PCB structure dimensions draw Board (Board Outline).
2. . The components dispersed (Disperse Components), components will be arranged around the edge of the plate. .
3. The components in one move, rotate, and drop it onto the plate edge, according to certain rules placed neatly.
2. .3. .2 Automatic layout. .
PowerPCB provides automatic layout and automatic layout of local families, but for most of the design, the results are unsatisfactory.
, Not recommended. 2. .3. .3 Note. .
a。. Layout of the first principle is to ensure that the wiring layout pass rate of mobile devices to the attention of the fly line connections, a connection between devices.
Pieces together. .
b。. Digital devices and analog devices separately, as far as possible away from.
c. . Decoupling capacitor as close to the device's VCC. .
d。. Place the device to be taken into account in the future, not too dense.
e. . More use of the software functions provided by the Array and the Union, to improve the efficiency of the layout. .
2. .4 routing.
There are two ways cabling, wiring manual and automatic routing. PowerPCB manual routing feature provides a very powerful. .
Includes automatic jostled, online design rule checking (DRC), automatic routing from Specctra cabling engine, usually.
Two methods with the use of common steps is manual - automatic - manual. .
2. .1 .4... manual wiring
1. . Automatic routing before hand cloth some important networks, such as high-frequency clock, the main power supply, etc., these networks are often right. .
Walking distance, line width, line spacing, shielding and other special requirements; in addition, some special package such as BGA, autorouting a..
Hard cloth may have rules, but also by hand wiring. .
2. Automatic routing, also by hand wiring on PCB alignment adjustment.
2. .4. .2 Automatic routing. .
After the end of the manual, the rest of the network automatically routing from the cloth. Select Tools-> SPECCTRA, launch the S. ..
pecctra router interface, set up DO file, press Continue to start the Specctra router automatically routing node. .
If the cloth beam back to 100% pass rate, you can manually adjust the wiring; if less than 100%, the layout or manual.
Workers wiring problems, need to adjust the layout or manual routing, until all the fabric through so far. .
2. considerations for .3 .4...
a. . The power line and ground as bold. .
b。. Decoupling capacitor as far as possible, directly connected with the VCC.
c. . Set Specctra the DO file, add the Protect all wires first order, to protect hand-line is not self-fabric. .
Fixed wiring is cloth.
d. . If you have a mixed power supply layer, the layer should be defined as the Split / mixed Plane, the wiring before they split, cloth. .
Finish line, use the Plane Connect Pour Manager for copper.
e. . All the device pin is set to heat pad mode, the practice is to Filter Set Pins, select all of the pins, repair. .
To change properties, Thermal options before the tick.
f. . Manually routing options open when the DRC, with dynamic routing (Dynamic Route). .
2. check the complete technology book on protel .5.
Check the items spacing (Clearance), connectivity (Connectivity), high-speed rules (High Speed). .
And power (Plane), these projects can choose Tools-> Verify Design. If you set the cache rule.
, Must be checked, otherwise you can skip this one. Check out the error, you must modify the layout and routing. .
Note:.
Some errors can be ignored, such as the Outline of the part of some connectors on the frame, the inspection interval will be out. .
Wrong; in addition each modified line and through-hole, try once coated copper.
2. .6 Review. .
Review the checklist under "PCB" content including design rules, of the definition, line width, spacing, pads, through-hole settings;.
In addition we must review the reasonableness of the device layout, power supply, ground network, alignment, high-speed clock network of lines and shielding. .
Decoupling capacitor of a substantial and connections, etc. Review failed to modify the layout and wiring, qualified persons and, following the review.
Designers were signed. .
2. .7 design output.
PCB design can be output to printer or export of Gerber files. PCB layer printer can print, easy to designers and. .
Review to inspect;-painted paper to the plate manufacturers, production of printed circuit board. -Painted paper output is very important, in relation to this.
Time design success or failure, the following will focus on the output Gerber file note. .
a。. Requires the output layer wiring layer (top, bottom, Middle wiring layer), power (including the VCC and GND level.
), Screen printing layer (including the top screen and bottom screen), solder mask layer (including the top and bottom solder mask solder), also. .
To generate a drill file (NC Drill).
b. . If the power level is set to Split / Mixed, then Add document. Mouth of the document. Select Routing,. .
And each time you export-painted paper before the use of PCB diagram Pour Manager of Plane Connect for futong;.
If set to CAM Plane, then select the Plane, Layer items in the set time, we should Layer25 plus, in Laye. .
Select r25 layer Pads and Viasc. In the device settings window (by Device Setup), Aperture value will be changed to 19.
9. .
d。. In the settings of each layer in the Layer, the selection Board Outline.
e. . Set the screen layer Layer, do not choose Part Type, select the top (bottom) and the screen layer Outline,. .
Text、Line 。.
f. . Set the solder layer Layer, select the through-hole, said through-hole solder does not increase, said the family did not choose solder through-hole, depending on the specific. .
Circumstances determine.
g. . Generate drill files, use the default settings PowerPCB Do not make any changes. .
h。. All-painted paper output, using open and print, CAM350 by designers and review under the "PCB Checklist".
Check. .
Through-hole (via) is a multilayer PCB, an important part of the cost of drilling is usually accounted for PCB manufacturing costs by 30%.
40%. Simple to say, PCB on each hole can be called through-hole. From the point of view function, through-hole can be divided into two categories. .
: The first is used for the electrical connection between layers; the second is used for devices, fixed or positioning. If you are installing from a process point of view, this.
These vias generally divided into three categories, namely, blind holes (blind via), buried vias (buried via) and through-hole (through via). .
Blind hole located at the top of the printed circuit board and the underlying surface, have a certain depth, surface and line and the following inner lines.
Connection, the depth of the hole usually does not exceed a certain ratio (aperture). Buried hole is located in the inner connection hole printed circuit board. .
It does not extend to the circuit board surface. Both types of holes are located in the lining of the circuit board, laminated hole forming before using the work.
Art completed the formation of the vias may also do some inner overlap. The third is called through-hole, this hole through the whole. .
A circuit board that can be used to implement internal interconnect or as components of the installation location of the hole. Due to the hole in the process is easier to achieve.
Low cost, so most of the printed circuit board are using it, rather than the other two holes. Following said vias. .
No special instructions, will be considered as a through hole.
From the design point of view, a through-hole mainly consists of two parts, one middle hole (drill hole), the second is. .
Drilling around the pad area, see the following figure. This two-part size determines the size of the hole. Obviously, in high-speed, high.
Density PCB design, the designer is always hope through holes as small as possible, so that the wiring board to allow more space for this. .
The smaller the hole itself, the smaller the parasitic capacitance is also, more suitable for high speed circuit. But at the same time reducing the size of the zone.
To the cost increase, and through holes the size of the decrease could not unlimited, it by drilling (drill) and electroplating (pla..
Ting) technology limitations: the smaller the drill hole takes longer, but also more easily from a central location; and.
When the hole is deeper than 6 times the Xin words, the hole on the wall can not guarantee uniform copper. For example, the normal one is now 6. .
PCB Board thickness (depth) is about, so 50Mil PCB manufacturers can deliver the words of this minimum 昕 only 8.
Mil. .
Second, through-hole of the parasitic capacitance protel technology encyclopedia.
Via its existence on the ground parasitic capacitance, if the shop is known through-hole formation in the isolated hole diameter D2, through-hole pad. .
Diameter D1, PCB thickness T, plate substrate permittivity ε, for through-hole size approximate the parasitic capacitance:.
C = 1. .41 ΕTD1 / (D2-D1). .
Parasitic capacitance of the hole will have major impact of the circuit is to extend the signal rise time, reduces the speed of the circuit.
For example, for a thickness of 50Mil the PCB board, if you use diameter 10Mil, 20Mil diameter over pads. .
Hole, pads and makeshift copper distance for 32Mil, then we can approximate the formula above to work out of the hole parasitic capacitance.
Generally is: C = 1. .41 X4. .4 X0. .050 X0. .020 / (0. .032-0. .020) = 0. .517 PF, this part of the capacitance of the rise time. .
Variation: T10-90 = 2. .2C (Z0/2) = 2. .2x0. .517x (55/2) = 31. .28ps. As can be seen from these numbers, though.
Single through the hole caused by the parasitic capacitance increases the effectiveness of extension of slowing down is not very obvious, but if the alignment holes used multiple times. .
To switch between layers, designers should carefully consider.
================================================== ===========. .
Third, the parasitic inductance of the hole.
Similarly, the parasitic capacitance of vias, while there also exist parasitic inductance in the high-speed digital circuit design, the send-off hole. .
Health hazards of inductance is often greater than the effect of parasitic capacitance. It would undermine the parasitic inductance, capacitance and bypass.
Weaken the effectiveness of the entire power system filter. We can use the following formula to calculate a simple approximation of the parasitic vias. .
ICP:.
L = 5. .08 H [ln (4h / d) +1] where L refers to through-hole inductors, h is the length of through hole, d is the diameter of center hole. From the formula. .
You can see, through-hole diameter on the inductance of a smaller, but the greatest impact on the inductance is the length of the hole. Still use.
The example above, can be calculated through the hole inductance: L = 5. .08 X0. .050 [Ln (4x0. .050 / 0. .010) +1] = 1. .015 NH. .
If the signal rise time is 1ns, its equivalent impedance size: L/XL = π T 10-90 = Ω 3.19. Such resistance.
Anti-adoption in a high-frequency current can no longer be ignored, with particular attention to, to connect power supply bypass capacitor layer and stratum. .
When you need to pass both through-hole, the hole of the parasitic inductance is multiplied.
4, high-speed PCB design in the through-hole. .
Through the hole on the face of the parasitic behavior analysis, we can see that in the high-speed PCB design, seemingly simple too.
Hole to the circuit design are also a great deal of negative effects. To reduce the parasitic vias adverse effects. .
The design can minimize:.
1, from a cost and signal quality on both sides, choose a reasonable size of the through-hole size. Such as the inner layer of the 6-10. .
Save the module PCB design, the selection of 10/20Mil (drilling/pads) for through-hole is better for some of the high density of small dimensions.
The board, you can also try using 8/18Mil the holes. Under current technology, it is difficult to use a smaller size than hole up. .
For power supply or ground hole you can consider using a larger size to reduce resistance.
2, the two discussed above formula can be drawn, using thin help reduce PCB board had sent the two holes. .
DH parameters.
3, PCB board signal traces as far as possible without changing the layer that is as far as possible not to use unnecessary vias. .
4, power and ground pins to the nearest beat through-hole, the hole and PIN between the leader as short as possible because they will.
Lead inductance increases. While power and ground leads as possible crude to reduce the resistance. .
5. change in signal layers near placement of the hole hole some grounding in order to provide the most recent loop signal. You can even work.
PCB, a lot of ground to place a number of redundant vias. Of course, also to have flexibility in the design. Discussed earlier holes. .
Models are on each floor have pads, sometimes we can add some layer pads to reduce or even remove it. Special.
Hole density is very high in the past cases, may lead to the formation of a copper layer in the shop cut off circuit breaker tank, to resolve this. .
Issues in addition to move the location of the hole, we can consider a hole in the shop copper layer pads size decrease.
=======================================. .
Q: from WORD files copied symbols, why can not display well in the PROTEL.
Re: What is your environment in the SCH, or in the PCB environment, in the PCB environment has some special characters can not be displayed, because it then. .
A reserved word.
Q: net name and port with the same name, pcb in the possibility of connection. .
Answer: Yes, you can generate a variety of ways PROTEL network, when you are in the hierarchy diagram to port-port, each route map.
NET can use the same name, they will not be the network name is the same as the connection. . But please do not use the power port, because that is all. .
Council.
Q:: How to import in PROTEL99SE PADS file, why pad properties changed. .
More complex: this is because both the software and each of the differences between versions, usually do a manual adjustment of it.
Q: Will Young prawns: Why software to power logic into protel schematic after the protel can not. .
To modify the properties, as long as a modified, not reality, or the whole display attributes? thank you.
Re: If the whole show, you can make an overall editor, only show part of hope. .
Q: shop 銅 principles?.
Re: laying of copper generally should be in your safe distance of more than 2 times. . This is the LAYOUT of conventional knowledge. .
Q: Potel DXP in automatic layout has no improvement? packaging is able to import in accordance with the principle of automatic diagram layout..
?. .
Complex: PCB layout and schematic diagram layout does not have certain inherent necessity, therefore, Potel DXP in automatic layout does not.
According to the schematic layout automatically arranged. (Based on the establishment of the component class graph can help PCB layout according to schematic with..
Add).
Q: Will the signal integrity analysis of information where to buy. .
Complex: Protel software comes with a detailed manual for signal integrity analysis.
Q: Why shop copper, which documents What major? What method? . .
Shop copper complex: data volumes can understand. But if that is too large, it may be that your settings are not scientific.
Q: Is there any way to the graphical schematic symbols can zoom it? . .
Fu: you can not.
Q: PROTEL principle of simulation can be argued, if detailed models can be good results. .
Simulation of complex: PROTEL is fully compatible with Spice model, you can obtain from device manufacturers free Spice models for simulation.
PROTEL also provides modeling, simulation has the professional knowledge, can be an effective model. .
Q: How do I join the Chinese in 99SE, if it seems less after speaking a lot! 3-28 14: 17: 0 but did not less.
Less features! . .
Complex of a finished the wrong version.
Q: How to make a hole diameter for the 2 * 4MM 6MM pad?. .
Complex: in a square hole mechanical layers callout size. With plate for specific requirements.
Q: I know, but how to layer, including power supply and connect with the inner layer. No network table, if the network table on. .
There is no problem.
Re: Using from-to classes generated network connection. .
Q: would also like to ask you in elliptic 99se pads placed on how to make a continuous pads of undesirable, circuit board manufacturers.
Not happy. Can be added in the next version of this set in? . .
Complex: library components, you can use non-pads of elements forming the pad shapes. When the PCB design to make it more.
The same network properties. We can recommend the company to Protel. .
Q: How do I obtain formerly free Protel and pcb library.
Re: So, you can of WWW. . PROTEL. . COM download. .
Q: I hold in copper on how to write the hollow (without laminate) type, expert answer to write, then coated copper, then.
In addition to the word book, but I tried it, delete the word, the empty is not, covered by copper, may I ask whether experts are wrong, you can. .
You cannot give it a try.
Re: word must be placed to provide Chinese with PROTEL99SE way, then Chinese (English) words to lift components (because..
As it is a security component) will be set to 1MIL spacing, and copper, and then move the copper, the program will ask whether to resume.
Copper, answer NO. .
Q paintings schematics, how to order? symbol PIN.
Re: Schematic construction of library, there is a strong check function, you can check the serial number, duplication, gaps and so on. You can also use arrays. .
Emissions, one-time pin placement rules.
Q: protel99se6 automatic routing after the block and the pin will appear near the alignment of clutter, such as burr general, sometimes. .
Even the triangle of the alignment, require significant manual correction, how do you avoid this problem?.
Re: reasonable setting element grid, once again optimize alignment. .
Q: with PROTEL drawing, repeatedly modified, found a very large file size (puffy), export and then import the small Xu.
More. Why? ? There are other ways for the paper thin it? . .
Complex: in fact, at that time because of PROTEL line shop copper is caused due to the intellectual property rights, you cannot use the PA. ..
DS in the "irrigation" feature, but it has its advantages, is the ability to automatically delete "dead copper." Achieved a large file, you use. .
WINZIP compressed it will be very small. Does not affect your file sending.
Q: What: In the same wire, how to make it not the same as the width of the different parts, and look straight appearance? Thank you! . .
Fu: you cannot automatically, you can use editing techniques. Protel technology encyclopedia.
liaohm Q: How will a circular to several decile? . .
Fanglin163 reply: use a regular geometric knowledge. EDA is only a tool.
Q: protel in common with the HDL is VHDL. .
PLD complex: Protel, Protel FPGA is.
Q: tears up shop after the copper, sometimes laying out the grid will be incomplete, how do? . .
Fu: you are in tears when setting up the thermal isolation with the reason, you only need to pay attention to safety spacing and thermal isolation mode.
Can also use the patch approach. .
Q: do asymmetric pads? drag wiring connected line keeps its original point of view and drag along?.
Re: can do asymmetric pad. When dragging the wiring can not be directly connected to the line with the drag to keep the original angle. .
Q: when and to the Protel, whether you can achieve high end EDA software the same effect.
Re: visual design may be. .
Q: Protel DXP automatic wiring effect whether to achieve the level of the original ACCEL?.
Re: worse than. .
Q: the pld function as though protel does not support the popular HDL language?.
Re: Protel PLD used Cupl language, is also a HDL language. The next version of the VHDL language can be directly input. .
Q: PCB inside the 3D functionality of hardware requirements?.
Re: need to support OpenGL. .
Q. How will a real hard-wiring fast, unaltered do computer?.
Re: The fastest way is to scan, and then converted into film with BMP2PCB program files, and then modify, but your PCB. .
Precision must be between 0. .2MM above. BMP2PCB program can be downloaded you 21IC circuit must be fought with sand paper is very light.
Light to be successful. .
Q: direct draw PCB, circuit for a defined network name?.
Re: In the Net Edit dialog box settings. .
Q: how to let the information in the aperture display or symbol signs with allego..
Complex: there are options in the output, can produce all kinds of drilling statistics and aperture symbols. .
Q: automatic routing of lock-out feature does not work well, some will try, do not know what.
Re: The latest version of no such problem. .
Q: how to implement multiple components of the overall turnover.
Complex: a flip of the elements to be selected. .
Q: I use p 99 edition joined the Chinese characters will panic, why?.
Re: D version should be due. .
Q: how to use the file powpcb PROTEL?.
Re: first build a new PCB file, and then use the import feature to achieve. .
Q: How do I import from PROTEL99 GERBER files.
Re: Protel pcb can only import their own Gerber, and Protel's CAM can import other formats of Gerber. .
Q: How do I put the cloth good PCB alignment of fine lines partially replaced by thick lines.
Re: Double-click modify + global editing. Note that the matching condition. Amend the rules to match the new width. .
Q: How do I modify an IC package inside of the pad sizes? If amendment should be how to globally set?.
Re: all selected for global editing. .
Q: How do I modify an IC package inside of the pad dimensions?.
Re: changes in the database within an integrated circuit package pad size we all know, the PCB board can be modified. (First..
In the symbol properties in unlock).
Q: Can do when PCB component parts of symbols modified or deleted? . .
Complex: in the symbol properties removed components lock, you can edit a symbol in the PCB, and will not affect the library symbol.
Q: The pad for the ground, including land, after the connection of the pads and how to set the width. .
Complex: package to set before connection pads with modalities.
Q: Why 99se storage projects when the format changed? . .
Complex: easy file management.
Q: How to remove the PCB, components such as resistor, capacitor size, etc., to get rid of you one by one, there are no quick way. .
Complex: use global edit, on the same floor hide all.
Q: Can you tell be about to launch a new version of PROTEL's name? A brief introduction What's New? protel hand. .
Dynamic routing jostled ability too weak!.
Re: Protel DXP, and wiring in the simulation that there would be greatly improved. .
Q: How do I get deposited copper area separation of deposited copper dropped.
Re: deposition of copper in the selection of "death to remove copper." .
Q: VDD and GND is used pad even where you do not see it.
Re: Open Network ID display. .
Q: the PCB in arc? In the paint line, then you can draw the arc directly as DOS version of arc mode so it can be.!
Are you? To it, how to set?. .
Fu: you can use shift + space can switch wiring form.
Q: protel99se9 level diagram of the total plan to use edit \ export spread generated spreadsheets, when they did not generate the. .
Tap the symbol and the drawings which corresponds to the labeling, packaging, etc. If you want to use the spreadsheet one-time modify all drawings.
Package, and then update the schematics, how to be? . .
Complex: point options.
Q: protel99se6 the PCB through specctra interface Export to specctra10. .1 Which found that those who do not. .
Network-grade of pads are gone, the results from those specctra actually have pads in the alignment, the mess.
, How to avoid this situation? . .
Complex: where two software import/export, most need artificial to do some adjustments.
Q: When you open within the layer, place the components and through holes, etc., as if it shorted together within the layer, and is correct. .
Complex: internal layer shows the results and the actual effect on the contrary, tie the copper is correct.
Q: protel execution speed is too slow, too much consumption of memory, and this is why? And if such a large system allegro implementation. .
It was very smooth!.
Re: The latest Protel software is not complete a simple PCB design, but the system design, including document management, 3. .
D analysis. As long as the PIII, Protel 128M above, can also be run as flying.
Q: How to add automatic routing of blind, buried hole? . .
Complex: set up automatic routing rules allow you to add blind and buried holes.
Q: 3D features of the hardware requirements? Thank you, I seem to not work. .
Complex: Please take off powerword.
Q: can a teardrop a plus complement it? . .
Complex: of course you can.
Q: Will the PROTEL99SE the file into PADS, why pad properties changed,. .
Complex: this kind of problem that generally need to be adjusted manually, such as modify the properties, etc..
Q: protell99se can open orcad formats, such as whether the future will not consider adding this feature? . .
Complex: now you can open the.
Q: adding characters in 99SEPCB board received no increase, but finished a lot of little things after the SE! . .
Complex: the file may be installed and configured incorrectly.
Q: SE finished in the menu after the start where the 3D feature? . .
Fu: you say you, View3D interface in the system menu (the arrow next to the left of the big) to start.
Q: How to draw the hole is not circular pad? ? ? . .
Complex: No.
Q: There are several PCB alignment mode? My computer is only two, through space to switch. .
Complex: Shift + space.
Q: What: For some there may be more current line, if I want online is not painted green oil, so I was on it on the tin. .
To increase the current. What should I do? thank you.
Re: You can simply place in the solder layer you want the shape of the tin. .
Q: how to draw an arc, with continuous painting Park way each bend art garden?.
Re: No, directly draw arc. .
Q: How do I lock a wiring?.
Re: first select the network, and then change the property in. .
Q: as the number of times each time you modify the more and more, protel files are increasing, how can allowing him to file size.
Become small? . .
Complex: in the system menu has the database tools. (To the left of the big Fiel menu arrows).
wangjinfeng Q: PROTEL PCB board how to set up in the painting by way of wiring the bus? . .
High Hoyer reply: Shift + space.
Q: how to write functions protel of PLD GAL16V8 process? . .
Complex: the use of the PLD function write protel GAL16V8 is relatively simple, direct use of Cupl is DHL hardware description language.
Can be programmed. There are examples to help. Step by step. .
Q: I use a 4 layer 99se6 cloth Board, cloth for an hour and twenty minutes of cloth to 99. .6 percent, but then over 11 hours more.
Only after the cloth to 99. .9%! Forced it to stop. .
Complex: the remaining few Net, do it manually and the rest of the pre-cloth, and then automatically, can reach 100 per cent of the Chief Administrator.
Q: In the multi-layer circuit boards pcb design, how to set up within the layer? The premise is completely manual layout and routing. .
Fu: there is a special menu settings.
Q: protel PCB diagram can output other file formats, such as HyperLynx's? Its help file that can be, however. .
In the menu does not have this option.
Re: now comes with Protel PCB signal analysis. .
Q: pcb in different net, finally how to let them?.
Re: best not to do so, should first change the schematic, outlaw years, others take over easier. .
Q: How do I put before the automatic routing of the cable lock before the non-selected one by one?.
Re: 99SE pre-wiring in the lock function well, do not choose one by one, as long as the automatic routing to set the mid-point of a hook. .
On the can.
Q: PSPICE's function has not changed. .
Protel complex: in the upcoming new version simulation functionalities will be improved.
Q: How to use Protel 99se the PLD simulation capabilities? . .
Complex: the simulation of the input file (. .si), then in the configure to choose Absolute ABS option, compiled into.
Power, may Simulation. See simulation output file. .
Q: protel. .ddb history as and delete.
Re: First remove the battle to recover, and then empty the Recycle Bin. .
Q: why do autorouting modifies prior Chief of line and they believe no cloth cloth and were set I..
Does it?. .
Complex: the first Chief of the cable lock. It should be on it.
Q: After some line in the visual layout is obviously bad, PROTEL so you have a point wiring (electric on). .
Complex: solely through automatic routing, any routing results will not be too beautiful.
Q: You can modify the pad in the pad properties of X and Y dimensions. .
Fu: you can.
Q: protel99se not after the new version? . .
Complex: coming soon. This version takes 2 years in terms of features, scope and Protel99SE, a great leap forward.
Q: 99se the 3d feature some more to promote it? If only the positive side! Its shape can do it yourself it? . .
Complex: 3D graphics you can use Ctrl + up, down, left, right angle turn. However, the display is not very useful.
Card better Caixing. protel technology Daquan. .
Q: is there a set of square hole? in addition to mechanical paint.
Re: Yes, in the Multi Layer set. .
Q: problem: fill, assuming that the wiring rules spacing as 20mil, but I have some devices require 100mil spacing, how.
Automatically fill?. .
Fu: you can design rules-->--> clearance constraint Riga.
Q: whether it is possible to use protel orcad schematic. .
Fu: you will need to generate orcad protel schematic netlist support file, then open by protel.
Q: How can multi-layer circuit board with automatic routing. .
Complex: Yes, with the dual panel, set up on the list.
